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Adrian POPA

Meudon

En résumé

Mes compétences :
Rational ClearCase
ModelSim
Ethernet
Perl Programming
Linux
DSP
hardware design
benchmarking
Verilog
TCP/IP
Oscilloscopes
Microcontrollers
CodeWarrior
C++
C Programming Language
user interface implementation
time support
standard implementation
physical layer software development
coverage analysis
VHDL
Texas Instruments Hardware
Tcl/Tk
Sun Solaris
Stress Analysis
Software development
Silicon validation environment development
Macromedia Flash
MPLS (MultiProtocol Label Switching)
Interferences Analysis
Image Processing
Graphics Processing Unit
DigRF driver development
CVS
Apache Subversion
Advanced RISC Machine (ARM)
AUTOSAR

Entreprises

  • Intel Mobile Communication - Software Integration

    Meudon 2014 - 2015 Position Software Integration
    Tool used Xtensa tools-chain, Perl, Make, Cmake, Bash, Git, Clearcase

    * LTE firmware integration ;
    * Develop Perl scripts to export ClearCase VOBs into GIT
    * Develop Perl script to translate existing GNU Makefiles into Cmake
    * Migrate firmware build system from GNU make in Cmake ;
  • ST Microelectronics - Software Engineer

    2013 - 2014 Tool used ARM RealView tools-chain, Lauterbach T32, Mentor Graphics Veloce Emulation Platform

    * Drivers development for STV0991 IC
    * STV0991's QSPI controller low level driver ;
    * AutoSAR compliant FLASH driver supporting Windbond W25Q and Micron N25Q families.
    * STV0991's SD/MMC card host controller low level driver
    * SD Memory, I/O, Combo card high level driver implementing:
    * Card Initialization and Identification as described by SD Host Controller Simplified Specification Version 3.0 standard
    * SD Memory and I/O card command classes as defined by SD Host Controller Simplified Specification Version 3.0 and SDIO Simplified Specification Version 3.0 standards. ;
  • Texas Instruments France - System Engineer

    Villeneuve-Loubet 2011 - 2012 Tool used ARM RealView tools-chain, Code Composer Studio for ARM, Zebu Prototyping, NCSim, Oscilloscopes, Logic Analyzers and other laboratory equipments


    * Vayu Pre-Silicon validation ;
    * Gigabit Ethernet switch validation - 3 port Ethernet switch: 1 host port and two 10/100/1000 Mbps Ethernet ports with GMII, RMII and RGMII
    * Define functional validation plan ;
    * Define board requirements and validation setup ;
    * Define benchmarking strategy ;
    * Define stress and robustness validation plan

    * Industrial Controller: 4 port Ethernet with 10/100 Mbps Ethernet ports with MII interface with real-time support, UART with PROFIBUS speed capability, eCAP, Enhanced GPIO and Industrial Ethernet Peripheral ;
    * Define functional validation plan ;
    * Define board requirements and validation setup ;
    * Define benchmarking strategy ;
    * Define stress and robustness validation plan

    * OMAP5 Silicon Validation
    * USB3 host controller - XHCI compliant:
    * Develop bare-metal low level driver for OMAP's USB3 host controller by following XHCI specification. The following capabilities have been implemented:
    * Basic enumeration: Set_Address, Get_Descriptor, Set_Configuration. ;
    * Bulk In/Out transfers.
    * USB2 and USB3 low power modes.

    * SATA host controller - AHCI compliant:
    * Develop bare-metal low level driver for OMAP's SATA host controller by following AHCI and ATA-ATAPI specifications.
    * Add OMAP's SATA controller support in libATA for linux kernel v3.0.4.
    * Validation plan definition and alignment between teams.
    * Define software and hardware requirements for electrical characterization activity.
    * OMAP5 ZEBU prototyping platform used for OMAP5 specific initialization.
    * Initial driver was developed using TI 816x DaVinci micro-controller

    * OMAP4 stress testing:
    * Implement complex scenarios using SGX540 GPU, DVFS, SmartReflex, Display Sub-System and low power modes to indentify potential timing issue, failures in asynchronous bridges, DDR controller arbitration issues, interconnect hangs. ;
  • ST Ericsson - Senior Software Engineer

    GRENOBLE 2010 - 2011 Tool used ARM RealView tools-chain, Clearcase, ST-Ericsson on the house tools for mobile phones, Rohde & Schwarz CMU200, Anite handset tester.


    * Team leader 3G Idle and Common Channels physical layer software development ;
    * Technical responsibilities:
    * Analyze and fix customer reported issues related to Modem's 3G Cell-Search ;
    * Implement customer's change request ;
    * Implement new features added to 3GPP releases ;
    * Provide support and technical expertise to other teams involved in the project

    * Leading responsibilities:
    * Regular reporting on team progress and blocking points.
    * Ensure all duties are in accordance with guidelines laid down by quality process.
    * Provide and plan trainings for all team members as required.
    * Pre-analysis of customer's issues, change requests and dispatch them to the appropriate team member.
    * Facilitate communication between team members and other work packages.
    * Solve issues related to work environment: clearcase, tools and scripts.
    * Physical layer pre-integration delivery. ;
  • ENEA - Senior Software Engineer

    2009 - 2010 Tool used Code Composer Studio for 320c64x+, Clearcase

    * OSE Compact Kernel BSP for TI 320c64x+ DSPs family ;
    * Ethernet drivers for 6482, 6486, 6488 and 6472 DSPs. ;
    * Ethernet broadcast packages support for multicore architectures. ;
    * Inter-DSP communication low level drivers. ;
    * OSEck Kernel booting and single/multi core reboot under dSpeed middleware control. ;
  • Texas Instruments France - System Engineer

    Villeneuve-Loubet 2006 - 2009 Tools used Code Composer Studio, TI ARM and DSP tools-chain, ARM RealView tools-chain, Zebu Prototyping, Modelsim, Oscilloscopes, Logic Analyzers and other laboratory equipments


    * OMAP4 and Monica bring up on ZEBU prototyping platform ;
    * Platform boot. ;
    * Silicon validation environment development. ;
    * Retarget ARM RealView tools-chain C/C++ streamed IO.

    * Electromagnetically Interferences Analysis ;
    * Validation plan definition.
    * Board requirements definition.
    * Software requirements definition.

    * Hancock Digital Voltage Frequency Scaling ;
    * Software development for application processor, modem and Power IC. ;
    * Stress performance tests for die-to-die interface. ;
    * Calibrate the SmartReflex accumulators for the weakest silicon layer.
    * Silicon validation for automatic voltage adjustments and SmartReflex characterization under temperature variation.

    * Hancock bring-up
    * Platform boot. ;
    * Die-to-die performance analyzis and stress validation. ;
    * LPDDR2 performance analyzis and stress validation.

    * Wrigley 3G MIPI DigRF interface characterizarion ;
    * DigRF driver development and RF IC initialization. ;
    * BERT and stress tests. ;
    * Complex I/O characterization from signal integrity point of view.


    Position Sub-System Verification Engineer
    Tools used NcSim, Modelsim, ICCR, CodeComposer Essential for MSP430, IAR Workbench for MSP430

    * Tejas digital sub-system functional verification. ;
    * Participate in digital sub-system hardware architecture definition. ;
    * Verification plan definition. ;
    * Develop procedures to speed up and reuse functional verification under different verifications environment. ;
    * Functional verification and coverage analysis. ;
    * Verification environment automation by means of PERL/TK having the purpose to unify the chip simulation and verification environments. ;
  • Freescale Semiconductor - Embedded Software Engineer

    2003 - 2006 Tools used VCS, Palladium, CodeWarrior for Embedded PowerPC, Logic analyzers and other laboratory equipment, C-Port Network processor tool-chain.


    * Board bring up for PowerQuick II, PowerQuick III and MPC5xx family of SoCs.

    * CodeWarrior plug-in development: Flash Programmer and Hardware Diagnostic Tools. ;
    * Common Flash Memory Interface standard implementation. ;
    * Firmware for NAND and NOR flashes. ;
    * Plug-in user interface implementation using wxWidgets library.

    * Pre-silicon system validation for MPC8641D. ;
    * RTL code update for co-emulation on Palladium hardware emulator. ;
    * Deploy U-BOOT and Linux kernel.

    * Embedded Ethernet drivers for MPC8560 PowerQUICC III network processor.

    * Deploy U-BOOT and Linux kernel on pCDS development system based on MPC8280 PowerQUICC II CPU as host processor and C-Port C5e-A1 network processor.

    * Continue development C-Port network processor software simulator.

    * C5e-A1 network processor demo application development:
    * MPLS router. ;
    * Gigabit Ethernet router with Half-Duplex capability. ;
    * MPEG2 transport stream de-multiplexer. ;

Formations

  • University Of Brasov (Brasov)

    Brasov 1998 - 2003 MSc

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