ST Microelectronics
- Senior ASIC Verification Engineer
2006 - 2011
- Mastering constrained random verification with e language
- eVCs development
- Verified many IPs: SPI,USART,RTC,LCD,Crypto AES/DES,Flash Memory Interface
- Mastering AMBA APB/AHB protocols
- Makefile and shell scripts development ...
- Developing verification strategy for new IPs
- Supporting other team members
- Participating to the enhancement of the verification methodology
- Daily and close communication with designers based in France and Italy
