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Brigitte TRUCHET

SAINT HILAIRE DU TOUVET

En résumé

Titulaire d'un DEST d'Informatique d'Entreprise, j'ai travaillé pendant une dizaine d'année en analyse/programmation Cobol et C au sein d'entreprises de services informatiques. Par la suite, jusqu'en fin 2015, j'ai pris une orientation plus spécialisée dans l'utilisation de logiciels d'implémentation de circuits intégrés en CMOS28 nm dans un flow de design RTL to GDS.
Je recherche actuellement tout type de contrat dans mes domaines de compétence mais peut également être intéressée par une expérience dans un domaine complètement différent en région grenobloise.

Mes compétences :
UNIX/LINUX
Relational Database
Cadence Software
Synopsys Software
C Programming Language
versioning management
backend design
Unix configuration management
Unicad Design
Integrated Circuit
C
COBOL

Entreprises

  • STMicroelectronics - Senior Hardware Designer

    2000 - 2015 + Floorplanning and Place&Route of integrated circuits in 65, 40, 28 nm CMOS technology from RTL to GDS for Multimedia applications, using Cadence tools suite (encounter P&R system) then using Synopsys IC Compiler.

    + Development/verification of TCL scripts to ensure proper execution of the flow and connection to the internal data management system.

    + In charge of procurement and views generation of memory cuts for the design group.

    + In charge of versioning management for the tools used during the implementation process using global setup mechanism deployed over the design team worldwide (UK - India -France).

  • Thomson Consumer Electronic Components - Back End Designer

    1994 - 2000 + Place, Route and Layout in 0.7, 0.5, 0.35 microns CMOS processes of 10 circuits from 50 mm2 to 110 mm2 (0,5 Mxtors to 2 Mxtors), including digital macros and analog parts. Done using Cadence (Preview, Qplace, Cell3) in Unicad Design flows, and Compass, (Chipcomp, Chipplanner linked with Cell3) in TCEC design flow.

    + Clock trees insertion using Ctgen from Cadence/ Unicad or CTC from Compass & verification of the correctness of the results using verifier.

    + Basic ERC/Timing verification (net buffering).

    + Verification Using Dracula DRC/LVS of these circuits and writing of the various procedures (Unix, SKILL, C, awk) to automate part of verification process.

    + Valuable knowledge of the various steps of backend design and related topics ( Netlist format, LEF/DEF syntax, clock distribution issues and net buffering).

  • Syseca logiciel - Software engineer

    1989 - 1993 + Software evolution of a Unix configuration management tool ` SPMS+' developed in C langage.
    . Development of new features
    . Improvement of existing functionalities
    . delivery and installation on client sites

    + Migration of a relational database system `SABRINA' from UNIX to OS2 environment (200 000 lines of C).

  • Sopra - Analyst Programmer

    1986 - 1989 + Development of Data Bank transactional processing on BULL computer (DPS7) using TDS interface and VAX system (VMS) - Cobol and relational Database langage.

Formations

Pas de formation renseignée

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