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Etienne FALAISE

Paris

En résumé

Started as technical project leader at Valeo in june 2017.

Previously at GACI Rugged Systems, responsible for the test environment of an in-flight recorder, including control, monitoring and data generation. before that, I updated the test and qualifcations procedures, and developped a test and qualification bench for an aircraft cabin server.

Worked for two and a half years at Sorin (now LivaNova), a medical company, in the heart and neuronal implants department. I was there to finish up the development of the tablet-software controlling the implant, and specify the tests of the whole equipment.

At sorin i also developped new test bench, my tasks included the development of a new controller software in c#/WPF, FPGA architecture in VHDL and embedded software in C. The test bench will be used as an emulation of the behaviour of a heart and/or nerves.

Before that, I was on an RATP project involving CCTV camera network management in Java JEE. I was responsible for developping an ActiveX plugin displaying up to 9 live video feeds from IP cameras, and also helped on development, integration and test of client and server based software.

Previoulsy working for Alcatel, implementing C algorithms for clock synchronization and radio signal calibration on LTE devices, together with calibration tools in LabView. Before that, spent 8 1/2 years at Thomson in Germany, where I trained as a hardware/software crossover engineer.

My skills englobe all levels of development, from digital design to user-end and test GUIs implementation, along with real-time host drivers and embedded firmware, including digital systems architectures (SystemC, VHDL).

Specialties:
• System design and architecture, verification and validation of signal processing blocks and interfaces, integration of embedded software
• Implementation of architecture for 8bit/16-bit microcontrollers
• Software Drivers for embedded micro systems.
• User and test GUI developpement (Java, LabView, Linux, WPF)

Mes compétences :
Assembleur
C
Électronique numérique
Architecture
Vhdl

Entreprises

  • Valeo - Chef de projet technique

    Paris 2017 - maintenant

  • GACI - Ingénieur Software (Dev et Test)

    VILLEBON SUR YVETTE 2016 - 2017 Prestataire IT-Link (Avril-juillet 2016) puis Eurogiciel (depuis septembre 2016)

    2017: Test environment for an in-flight recorder using C++/Qt & Python.

    Qualification test bench development for an Aircraft data server, running under Linux Debian 8.2, using bash and C++ applications.
    Factory test redeployment.
    software integration (C++)

  • Sorin - Ingénieur Software (Dev et Test)

    Paris 2013 - 2016 Prestataire IT-Link

    Sorin is a medical company specialized in heart and neuronal implants.
    Tablet-software controlling a pacemaker: Test procedure specifications, software integration and development (C++/C#/XAML/WPF)
    Pacemaker test bench: product, system, firmware and software specifications. Electronic bench with embedded µC in FPGA, controlled by a GUI through USB. Firmware/software architecture and design (VHDL/C/C#).

  • IT Link - Development Engineer for RATP CCTV Camera Network Management

    Le Kremlin-Bicêtre 2013 - 2013 Design and implementation of an ActiveX plugin displaying up to 9 or more live video feeds, using ffmpeg, SDL and VisualStudio. This plugin is to interact with a Java/JEE project through a JavaScript interface
    Developpement and test of JEE application, in JSP, java and javascript
    Integration of C++ and C# DLL libraries with SQL access (Posgres/PLSQL)

  • Alcatel Lucent - Ingénieur Software (Dev et Test)

    Paris 2010 - 2013 Prestataire IT-Link

    Architecte et développement logiciel pour des antennes émettrices réceptrices de téléphonie mobile LTE.
    Développement de drivers sur un système alliant électronique numérique et électronique analogique.
    Développement d'algorithmes temps réel en C/C++ sur cellule embarquée.
    Implémentation d'outils de test et de mesure en labview.

  • Thomson Video Networks - Architecture & Development Engineer

    Ille-et-Vilaine 2001 - 2010 • Conception, d'après spécifications, d'un algorithme de correction de pixels pour capteur CMOS. (VHDL)
    • Implémentation des drivers et spécification, conception, vérification des interfaces internes (microprocesseur) et externes (hôte) d’un décodeur DVB-S/2. En VHDL, Verilog, Assembleur, C, VC++ .
    • Conception de l’interface host-media d’un graveur DVD (normes DVD-/+R/W). En UML pour le C.
    • Spécification d’un circuit intégré dédié au graveur DVD (partie asservissement). En SystemC.
    • Responsable d’asservissements en électronique numérique sur microprocesseurs pour un graveur DVD et des interfaces utilisables par l’équipe hardware. En C, assembleur, LabView et MatLab.

Formations

  • University Of The West Of England (Bristol)

    Bristol 1997 - 2001 Master of Digital Systems Engineering

    Cursus basé sur les technologies numériques, les réseaux, l’asservissement, les microprocesseurs. Programmation en C, C++, assembleur et VHDL.

  • Université Rennes 1 IUT GEII

    Rennes 1995 - 1997 Automatismes et Systèmes

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