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Zekeriya ADIBELLI

GRENOBLE

En résumé

After more than 11 years of experience in (SoC) IC functional verification, I am looking for new opportunities and new challenges.

In the continuity of my activity, but also in complementary fields.
Preferably in my location area : Rhone Alpes and Switzerland.

Feel free to contact me for talking about it.

Mes compétences :
Shell
ASIC
Veloce
Denali PureView
Vmanager
Perl
Processeur ARM M0 A9 A5x , STM-XP70, Intel 8051
Clearcase
Git
FPGA
Perspec
NCsim
ModelSim
PSL assertions
Verification
Langage assembleur
C
System on chip
Verilog
VHDL

Entreprises

  • Stmicroelectronics - Secured Soc Verification Engineer

    2016 - maintenant Mobile application (simcard, NFC) and "Brand Protection" solution for IoT, printers
     Development of a verification plan and drivers for other resources.
     Develop drivers in assembly code on processor ARM-M0/SC000 and dual STM/XP70 processors in Lock Step.
     Debugging cycle accurate memory accesses (RAM,ROM,NVM) on APB/AHB bus
     In charge of non-regression of the product with Vmanager tool.

  • Stmicroelectronics - Set top box and Gateway SoC Verification

    2011 - 2016  Responsible of the boot of the SoC, based on ARM processor (A9, A53, A57)
     Verification of External Flash NAND, NOR, SPI, eMMC, (Denali, RTL Models)
     Verification of IP’s integration : Timers, FDMA, Clock Reset Generator, DVBCI …
     Developing RTL modules for the Testbench : Clock grabber, memories harness
     Emulation on Veloce platform, debugging, non-regression

  • Dolphin Intégration - SoC Verification

    Meylan 2006 - 2010 Consulting

    Design and verification of the STM XP70 processor (STM 3 mo)
    Design of instructions on peripherals modules of the XP70 processor

    Verification of a HDMI 1.3 link : transmitter/receiver (STEricsson (8 mo)
    Development of a testbench including a test controller driving and monitoring the HDMI link
    Using a JTAG emulator, management of I2C, I2S and ST7 controller with BIST and TAP

    Verification of memory controllers for smartphone appli. (STM 1,5 yr)
    Verification of Flash memory controllers : NOR, NAND, OneNAND for Ericsson products

    Verification of an Image Sensor for smartphone appli. ( STM 1,5 yr)
    Capture sensor : MMDSP DMA Image pre processor, protocols (CCIR,CCP, I2C, STbus)

    Internal projects

    Software Validation and Memory models equivalency ( 6 mo)
    Verilog norm validation on Smash simulator, memory models equivalency (electric vs RTL)

    Testability study of a seabed scanner (petroleum application) (5 mo)
    Redaction of specification of tests, development of the testbench and validation solutions

    Design on 8051 Family Core Controller (6 mo)
    Design and Verification of a peripheral extension (VHDL), assembly code
    Validation and emulation : Raisonance solution, board, ISS, FPGA prototyping

Formations

  • INPG (Grenoble)

    Grenoble 2003 - 2004 CSINA Conception des Systèmes Integrés Analogique Numérique

    Digital & Analog System Design Integration

Réseau

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