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Hatem ZOUARI

paris

En résumé

Qualifications :

Domains
• Electronic system Design & development:
Project analysis, Specification, HW Design documentation, Schematic design, PCB design, simulation, GERBER generation, industrialization, prototyping and electrical tests)
• Micro-processors / microcontrollers card:
Intel 51 : 8031, 32 , 87C51Fx Philips, Atmel 89C2051, 89S8252, Motorola : 68HC11a1, 68HC11e2, 68HC11f1, 68HC705, Microchip 16Fxxx, 18Fxxx…
Fujitsu, siemens 8bits / 16bits.
ARM, Cortex M0/1/3/4, XCALE 32bits.
• Digital & analog electronic :
Digital system TTL/CMOS, measurement & sensors interfaces, control interfaces, analog & digital treatment, data transmission RS232, bus RS485, modem, infrared, etc.
Low & average power control: motors, analog & digital control, etc.
• Printed Circuit Board.
• EMC design & test:
• EMC design EMC Schematic Design
EMC design guidelines for PCB
• EMC test Diagnose and troubleshoot EMI issues
Design recommendations to hardware designer


OS System Windows NT, 2000, XP, Linux
TOOLS Altium Designer, MENTOR Pads, ORCAD, Allegro, HyperLynx, Proteus, Eagle, ProtelDXP, Gerber viewer, AutoCAD…
Bus, Protocols UART: RS232, RS422, RS485, I2c, SPI, CAN…
Analysis tools Scope, digital analyzer, spectral analyzer.


• Standards:

EN 55022 Infor¬ma¬tion tech¬nol¬ogy equip¬ment. Radio dis¬tur¬bance char¬ac-ter¬is¬tics. Lim¬its and meth¬ods of mea¬sure¬ment.

EN 55024Information technology equipment - Immunity characteristics - Limits and methods of measurement.

IEC EN 61000-4-2, Electromagnetic compatibility (EMC)- Part 4-2: Testing and measurement techniques - Electrostatic discharge immunity test.

IEC EN 61000-4-3, Electromagnetic compatibility (EMC)- Part 4-3: Testing and measurement techniques - Radiated, radio-frequency, electromagnetic field immunity test.

IEC EN 61000-4-4, Electromagnetic compatibility (EMC) - Part 4-4: Testing and measurement techniques - Electrical fast transient/burst immunity test.

IEC EN 61000-4-5, Electromagnetic compatibility (EMC) - Part 4-5: Testing and measurement techniques - Surge immunity test.
...


Mes compétences :
Conception électronique
Cadence Allegro
Electronic Designer
Altium Designer
PCB Designer

Entreprises

  • Telnet Holding - Senior Electronic Expert

    paris 2006 - maintenant Projects and realisations:

    • SRV_EZ HW design and realization of servomotor control system for Bernard Controls (4 layers PCB, 200 components, Cortex M1 ST , analog and power controls, 6 voltage)
    • PAN Router: HW design and realization of Home Automation Gateway for WATTECO (8 layers PCB, 32 bit processor, DDR2, ZigBee, WIFI, Gbit ethernet, Ethernet, USB, 2 NAND-flash)
    • AVDEC: HW design and realization of audio-video decoding system for THOMSON (14 layers PCB, 2770 components, 3 cycloneIII from ALTERA, 5 processors 32 bits, 6 voltage levels, 23 DDR2, Gbit ethernet, Ethernet, serial & parallel video, High definition)
    • VDSL2: HW design and realization of MODEM VDSL2 for PATTON (8 layers PCB, 32 bit processor, DDR2, VDSL/ADSL interface, WIFI, Pots, Gbit ethernet, Ethernet, USB, 2 nand-flash)
    • TACHYMETER: HW design and realization of management system for rotation speed for CHAUVIN ARNOUX (2 layers PCB, 16 bit processor, USB)
    • Automotive / MECAP: HW design and realization of interface card with MOST bus for data transmission (4 layers PCB, 32 bit SoC ,MOST interface, video RCA)
    • Automotive / MECAP: HW design and realisation of interface card RFID system (2 layers PCB, 16 bit SoC ,USB, front-end RFiD)
    • AZUR2: HW qualification of photo printer for SAGEM

    Responsibilities:

    • Responsible of project monitoring and reporting
    • Responsible of process application
    • Responsible of HW architecture and design
    • Communication with customer
    • Standard application: EMC, ESD, Electrical safety
    • Team Leader:
    • Training of engineer of the team electronic (Design of electronic industrial system, Electronic CAD rules, Validation and qualification of electronic systems, Altium designer, MENTOR PADS, MENTOR Expedition, MENTOR HyperLynx, Allegro…) => Good technical level – Electronic team
    • Development of further system for embedded electronic systems.
    • Electronic design, analysis & validation.
    • EMC design, analysis, Test & validation.

    Technical environment:
    Materiel
    • emulator,
    • scope, Digital,
    • analyser, GBF,
    • ...
    Tools
    • Altium Designer.
    • Cadence ORCAD & Allegro.
    • MENTOR Pads.
    • Zuken Cadstar.
    • MENTOR Hyperlynx.
    • Proteus
    • ...

  • ARDIA - Senior Team Leader (Electronic Activity)

    2005 - 2006 Projects and realisations:

    Automotive: HW design and realisation of electromagnetic breaking system for bus (4 layers PCB, 16 bit processor, power electronic stage, CAN interface)


    Responsibilities:

    Responsible of HW architecture and design
    Communication with customer
    Standard application: EMC, ESD, Electrical safety

  • MICROINDUS - Senior Team Leader (Electronic Activity)

    2003 - 2005 Design and realisation of industrial system (6 layers PCB, 8 bit processor, USB, UART)
    Design and realisation of an electronic access control system (4 layer PCB, 8 bit processor, SMART card, USB, UART)

  • TIID - Ingénieur Designeur

    1997 - 2002 Design and realisation of an industrial communication network for data, test platform development, performance study (4 layers PCB, 8 bit processor, USB, UART, RS485)

Formations

  • ENIS.Sfax (Sfax)

    Sfax 1992 - 1997 Ingénieur

Réseau

Annuaire des membres :