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Herve DANIEL

Boulogne Billancourt

En résumé

Graduated in Electronic Engineering (specializations in Microelectronic and signal Processing), with 14 years experience in design of digital circuit, Architecture and IP design lead for Wireless Texas instruments application processors (OMAP).
Excited about shaping the future of a semiconductor company by defining and architecting the next generation products. Committed to high quality execution & enthusiast.


Mes compétences :
Design
Architecture
Fpga
C / C+
Synthesis
Semiconducteur
Low power
SOC
digital design

Entreprises

  • Huawei - ISP IP Architect

    Boulogne Billancourt 2013 - maintenant

  • Texas Instruments - Graphics and multimedia Architect

    Villeneuve-Loubet 2010 - 2013 Joined the Multimedia architecture team, working on OMAP5 and OMAP6.

  • Texas Instruments - Architecture and Design lead

    Villeneuve-Loubet 2006 - 2010 Define the architecture, led the design and verification team for the development of an HD Video IP for wireless applications used in OMAP4 and OMAP5.

  • Texas Instruments - Architect and Design lead

    Villeneuve-Loubet 2004 - 2006 As a member of the OMAP3 multimedia development team, I was in charge of defining the micro-architecture and design of a loop-filter hardware accelerator, targeting D1 resolution at 30 FPS and supporting multiple codec such as H264, MPEG2/4, WMV9 and RealVideo:

  • Texas Instruments - Architecure and Digital Design

    Villeneuve-Loubet 1999 - 2004 Development of tightly-coupled hardware accelerator extension for the C55 DSP of Texas Instruments, accelerating data computation for specific applications while decreasing the power consumption.
    •Responsible of the specification, design, verification and C model (cycle accurate) delivery of hardware accelerators.

Formations

  • Ecole Polytechnique De Montréal (Montréal)

    Montréal 1996 - 1998 microelectronique

Réseau

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