Mes compétences :
VisualC
Visual Basic
VHDL
C
Assembler
C + +
MaxPlus II, Xilinx, Quartus II, Visual C++, Protel
Bus CAN, CCP(Can Calibration Protocol), OSEK/VDX,
Entreprises
Telnet/Sagem
- Technical Project Manager
2013 - maintenantLGMS project (WRDC ): R & D Sagem aerospace (from 09/2013 until now)
o The objective of this project is to check/validate the Software High Level Requirements for the Operational Software of Wheel Remote Data Concentrator computer (WRDC), part of the Landing Gear Monitoring System (LGMS) in the A350-XWB Aircraft. The project is composed of 5 activities with 3 team leaders and 16 engineers as follow:
SDD activity (design inspection) composed of 1 team leader and 2 engineers
Code activity (code inspection) composed of 1 team leader and 6 engineers
UT activity (Unitary test) composed of 1 team leader and 4 engineers
TA/TI activities (Acceptance test/ Integration test) composed of 4 engineers.
o Prepare the proposal of the project
o Elaboration of the management plan (planning, cost, quality, risk, defines metrics, gather customer requirements...).
o Manage all these 5 activities, where the three first are in back office in Tunisia but the last two activities are in front office in Sagem (France).
o Interface with software project manager from Sagem
o Take preventive action
o Gather measurement from different activities
o Take corrective action if the activity is behind schedule or over budget
o Achievement of key performance indicators (KPI) relating to time, cost and quality.
o Conflict resolution with team member
o Daily stand up meeting with team members.
o Weekly meeting with all teams to discus/track risks, problems found during this week, action plan....
o Communicate schedule update to customer
o Report weekly project status report to management (Sagem)
o Report monthly project status to management.
Telnet/Valeo
- Technical Project Manager
2012 - 2013GM (General Motor) project_S97 (Electric Vehicle): R & D Valeo (from 03/2012 to 05/2013)
LDB software validation for DCDC and three phase inverter
o Mission one month in Valeo cergy, France
o Understanding GM requirements
o Elaboration of Requirement traceability matrix
o Elaboration of the HSI (Hw/ Sw Interface) document
o Elaborate project charter.
o Use of tailoring worksheet to select which processes are adequate for the success of the project.
o Preparation of the management plan (planning, risk, quality cost, WBS, determine team...)
o Interface with different software coordinators in Valeo Cergy, France
o Measure performance against performance measurement baseline.
o Determine variance and take corrective and preventive actions
o Manage request changes with customer and update project management plan.
o Perform quality control
o manage 8 engineers which are involved in this projects in Tunisia (back-office)
o Weekly meeting with all teams to discus/track risks, problems found during this week, action plan....
o Report weekly project status report to management
o Elaborate Lesson learned.
Telnet/Valeo
- Technical Project Manager
2010 - 2013VEL projects (Electric Vehicle): R & D Valeo (from 01/2010 to 07/2013)
Responsible and accountable for the coordinated management of multiple projects for Valeo Electric vehicle program. This program is composed of three projects (Project VEL_GEN2, Project VEL_Compacité, Project VEL_Compacité)
o Preparation of the Management plan
o Elaboration of tailoring worksheet to select which processes used for the success of the project.
o Translate customer needs in requirement
o Create Requirement traceability matrix
o Interface with 3 software coordinators for different projects VEL in Valeo Cergy, France
o Shared 6 engineers are involved for developing in various VEL projects in Tunisia (Back office)
o Managed a team of 6 engineers, coach, mentor and lead personnel within a technical team environment.
o Technical coaching to the team
o Track several projects
o Take preventive action
o Gather measurement from different projects
o Take corrective action
o Achievement of key performance indicators (KPI) relating to time, cost and quality
o Weekly meeting with all teams.
o Report weekly and monthly project status report to management
o Writing technical notes and procedures.
Project VEL_GEN2 This project is to design a yield Integrated Management function inverter Documentation on quick interfacing communication between FPGA and microcontroller. Study the technical feasibility of high-speed SPI communication between the microcontroller and FPGA. Choice between the microcontrollers TC1797, XC2000, MPC6504 and SH72546. Implementation of the SPI driver in SH72546 as a Master and simulate the FPGA using the microcontroller XC2000. Implementation of the IRQ driver Implementation of the ADMAC driver on SH72546 to automate the data transfer between the SPI registers (reception and transmission) and RAM. Reviewing the implementation of the SPI slave driver of the XC2267 Reviewing the implementation of the PEC driver in XC2267 Validation of SPI communication between XC2267 and SH72546. Implementation of the DMAC driver Implementation of the timerC driver as input capture Automation of SPI communication on rising edge of the timerFPGA (without CPU charge) Preparation of technical document for SPI communication. Documentation of TAMAGAWA resolver
Proposal of a technical solution for the determination of the engine’s angle using the resolver SinglSyn.
o Project VEL_Compacité
This project is to design a compact compressor for Electrical Vehicle. Modification of the ADC Driver Implementing of the PWM6 in MCM mode Analysis and proposed a solution for synchronizing the activation of the ADC with the PWM6 Reviewing the implementation of synchronizing the activation of the ADC with the PWM6 Reviewing the implementation of signal Capture Position QEP
o Project VEL_DCDC
This project is to design a DCDC converter Generation of the BSW layer library
Telent/Valeo
- Technical Project Manager
2007 - 2010DCDC_XC2 Project (DCDC converter): R & D Valeo (from 09/2007 to 01/2010)
o Uncover customer requirement
o Preparation the Management plan (planning, risk, cost, quality)
o Use of tailoring worksheet to select which processes are adequate for the success of the project.
o Porting the OS code from XC164CM to XC2267
o Porting the Error Module.
o Porting the Timer Driver.
o Coding the ADC module using the ERU module (External Request Unit) to trigger the converter module with Cap/Com2.
o Using the PEC module to store the converted values in RAM.
o Use of AUTOSAR rules when coding.
o Review of the application spec.
o Porting the OS code from the Keil IDE to the Tasking IDE
o Porting the DCDC software from XC2267 to XC2765X
o Configuring the Tasking compiler for QAC
o interfacing with Customer
Telnet/Valeo
- Development Engineer at TELNET (engine control division)
2004 - 2007• BME Project (Bougie à multiple étincelle)
o Mission in France at Valeo « VEMS » for 2 months.
o Implementation on the µC SH7058 the driver of CAN 2 for sending messages «time Dwell », to the BME calculator, for not overloading the CAN 1 of the µC
o Documentation of the CCP protocol (Can Calibration Protocol)
o Up date the CCP to obtain a generic version and correction of several bugs existed in the old version.
o Implementation of the SET_S_STATUS service which allow the user to save the calibrations data in the FLASH of the µC XC164CM
o Implementation of the save of DAQLists properties in flash, to spy the calculator at the initialization.
o Documentation of the OSEK/VDX protocol
o Implementation of the OS in the µC XC164CM.
• Renault Project
o Implementation on hitachi µC the new « failure manager » intended to detect the panels on the phase of diagnosis for the MEGANNE cars.
o programming with CAPL language diagnosis tool on CANalyzer.
o Implementation on hitachi µC the « freeshift » mode, who indicates to the driver when change speed to have an optimal consumption of fuel-oil.
o Validation on idevaid of the « failure manager » soft
o Validation on idevaid of the « freeshift » soft
o Preparation of the validations plans to verify the good coding of the APIs of the Hw part who are the interfaces between the applicative part and the hardware one.
• Quality
o ATM Member (Appraisal team member) for the CMMI certification level 5
o Participation for the implementation of the CMMI level 5 for the ADAE project (Engine control division)
o Participation as an ATM Member for the obtention of the CMMI certification level 5 (optimized)
o conduct audits for the SQA team (System Quality Assurance).
EBSYS
- R&D Engineer
2002 - 2004Development engineer at EBSYS ‘EMBEDDED SYSTEMS TECHNOLOGY’ technical partener of SST division of ANALOG DEVICES since july 2002
•telephony security Project
o Programming on DSP 2181 and designing the hardware part of the telephony security module
•PLC Project
o Studing of the European standard 50065-1 (part1 : general requirements, frequency bands and electromagnetic disturbances)
o Design of the Hardware part of the AFE ‘ Analog Front End ‘ of PLC modem ‘Power Line Communication’ bande A et C ‘ Version 2’
o Design of the ’AFE’ of the PLC modem ‘version 3’
o Mission in India of a length of 2 weeks for the realization of the PCB of the PLC modem and realizations of the tests on the cards
o Design of the hardware part of a line sensor that permits to characterize the electric line
o Use of the Codec AD9785 to design the AFE part of the Home Plug
•video Project
o Studing the H264 standard
o design of the hardware part of the picture acquisition by replacing the BT829 codec by the component of analog devices ADV7183 inspired by the PANVIEW board.
o Implémentation on DSP of the ¼ pixel that permits to reduce the bitstream and to give a good quality of the picture
o Make benchmarking as using the C code delivered by the ITU on a customer's sequences
o Programming on C an interpolation filter
Formations
ENIT(Ecole Nationale D'Ingénieurs De Tunis) (Tunis)
Tunis2008 - 2009Professional Master degree, entrepreneurship and Innovation Management
SUP'COM (Tunis)
Tunis2004 - 2005Master degree of telecommunication
ENIT(Ecole Nationale D'Ingénieurs De Tunis) ENIT (Tunis)
Tunis1999 - 2002Electrical Engineer
Institut Préparatoire Aux Études Ingénieurs De Nabeul (IPEIN) IPEIN (Nabeul)
