-
Mentor Graphics
- Applications Engineer
Meudon la Forêt
2001 - maintenant
Applications engineer for :
- FPGA Design Flows
- Design creation, Management
- Design Verification
- FPGA Synthesis
- Formal Verification
-
Mentor Graphics
- Training Engineer
Meudon la Forêt
1996 - 2001
Training instructor for :
-Digital simulation tools
-Analog simulation tools
-RTL synthesis tools
-Languages : AMPLE, VHDL, VHDL-AMS
-
Hi Tec
- Hardware Engineer
1994 - 1995
Hardware Engineer at Hi Tec
Computer Software Industry
Developped a data acquisition system prototype.
