Mes compétences :
CEM
EMC/EMI
Signal Integrity
TCL
Power Integrity
ELDO
SPICE
Power analysis
Entreprises
STMicroelectronics
- SoC Sign-Off Senior Engineer
2010 - maintenant• Development, maintenance and support of kits used by end-users for Sign-Off checks
• PCB validation: resonance analysis, power and signal integrity checks, EMI analysis, PCB model extraction for SPICE system-level simulation
• Monitoring researches on substrate noise analysis and immunity
• Expertise on power analysis, power rail noise analysis, I/Os signal integrity, modelling, reduction, AMS at SoC and system level (PCB, Package, die), TCL, SPICE
• Software: Apache RedHawk and Sentinel, Cadence EPS, Mentor ELDO, Cadence Allegro-Sigrity
STMicroelectronics
- Senior CAD Engineer
2008 - 2010• Research work on Electromagnetic Compatibility and Interferences (EMC/EMI) at system level and Simultaneous Switching Output (SSO) noise
• Research on Design Methodologies for EMC and I/Os SI (SSO noise) with focus on automotive
• Expertise on power rail noise analysis, I/Os signal integrity, modelling, reduction, AMS at IPs, SoC and system level
• Software: Apache RedHawk, Totem and Sentinel-SSO ; Mentor ELDO
STMicroelectronics
- CAD Engineer
2006 - 2008Contract with French government and STM for 2 years (named Volontariat à l'International en Entreprise, V.I.E) as CAD Engineer focused on Electromagnetic Compatibility and Interferences (EMC/EMI):
• Research work on EMC/EMI due to power rail noise
• Research on Design Methodologies for EMC/EMI with focus on automotive and wireless applications
• Expertise on power rail noise analysis, modelling, and reduction at SoC level
• Software: Synopsys PrimeRail, Synopsys PrimeTime-PX, Apache RedHawk
STMicroelectronics
- Developer Engineer
2006 - 2006• Worked on ST software applications
• Implemented a data storage
• Software development for data storage monitoring
• Technologies: JEE, Applications Server SunOne, Perl, Database PostgreSQL
