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CEA-Grenoble (France)
- Research Engineer in Electronics
PARIS
2013 - maintenant
Standard Cell Design & Characterization.
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STMicroelectronics
- Customer Support/Standard Cell Libraries Development Microelectronics Engineer.
2010 - 2012
Previous position as an Electronics Engineer from STMicroelectronics (Crolles, France) and working at ST-Ericsson customer site (Finland) as a Customer Support Interface & Development in the Digital Logic Team (former Standard Cell Team).
The targetted customer products are Chipset Platforms (which consists of HW & SW & Tools targeting for a product platform for cellular phone OEM customers). These chipsets are then sold to the OEM customers.
Customer Support Activity :
1st level of Technical Support : use of CAD Vendor tools such as cadence IC/Virtuoso (schematics/layout), Analog simulations (eldo), Digital simulations (QuestaSim). HelpDesk Interface (Tickets/Needs), weekly, confcalls, local support of the Engineers.
Standard Cell Libraries Development :
Developments through ST Tools/scripts (.tcl, ...), and eldo (analog simulations) : characterization files (timing/leakage/power/noise library information)), P&R files (layout abstract file, PG pins info files …), packaging, QA Tests for P&R, STA (scripts to launch some Digital Flow tools for the QA of representative cells)…
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STMicroelectronics
- Intern : Radio-Frequency Design (R&D).
2009 - 2009
Radio-Frequency Design Engineering internship : “Study and Design of a programmable delay cell in Silicon Technology (B9MW SiGeC 130nm)” at STMicroelectronics Crolles (France).
Examples of application : Automotive Radar Sensors (ARS) and Multimedia (WiHD). Design at 77 GHz (ARS).
-Determination of the electrical structure (schematics) : reading of publications, simulations to make a state of the art of basic MOS/Bipolar transistor schematics (Common Emitter …) and evaluate the performances of the Technology for the specific case of the delay-cell study.
-Determination of the formula to compute the electrical delay (to define the parameters affecting the electrical delay). Correspondence with the emission angle of the signal (RF Antenna Network).
-Done : proposal of an electrical schematics + layout. DRC, LVS , PLS simulations.
Constraints :
emission angle variation of 90° which means approximatively an electrical delta delay of 10ps, S-parameters (S11,S22 < -10 dB, S21>10dB, NF<10dB, stability, linearity in the Temperature range [-40C:+125C], robustness/reliability (Monte-Carlo simulations), area, biasing…
Tools used :
Unix, Cadence IC (simulators RFDE/ADS, layout (Virtuoso)), Matlab (Mathematical simulations/waveforms).
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Thales Research & Technology
- Intern : Radio-Frequency MEMS testability (Testbench Design).
Courbevoie
2008 - 2008
Design of a LabView driven TestBench for Radio-Frequency MEMS (Micro-Electro-Mechanical-Systems) characterization lifetime, at Thales Research & Technology, Palaiseau (France).
RF MEMS studied and tested : capacitive switch with one membrane which commutes a High-Frequency line. Examples of application : in the RF transceiver to direct the signal from the antenna to the receiver part, or from the emission part to the antenna.
Design of a User Interface with LabView to define the stimuli to apply to the membrane (DC signal with the shape of a complex "crenel") to make the switch commutes the HF line
+ reception of the signal from the RF MEMS switch through the Power Meter device, to estimate the Number of commutations until failure with S21 parameter.
The RF MEMS switch was in a Silicon wafer.
The LabView User Interface was designed to be launch to send signals to the RF instrumentation and Power Instrumentation and receive the RF MEMS switch signals.
+ order of equipment : PCI-Express LabView card, Power Meter sensor, webcam.
Tools used :
Windows OS, LabView, RF Instrumentation (Synthetizer, Power Meter, NetWork Analyzer…).
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ESIEE Engineering
- Student
Rive de Gier
2008 - 2008
Electronics projects : I designed an AC-AC converter (voltage, frequency) to transfer windmill power to the electrical network (PSPICE simulations, FPGA implementation with VHDL and use of power electronics devices).
IC Design (Cadence Virtuoso): I designed a LNA (Power & Noise adaptation, electrical performances simulations), Class-D Amplifier (electrical simulations and comparator layout).
MEMS technology : I designed a one-axis capacitive accelerometer with Coventorware. I did simulations with Ansys about clamped-clamped beams. I characterized acoustic piezoelectric tranduscers, I used Vision software (Veeco Instruments) for thickness layers measures. I did electrical characterization (capacitance measures) and acoustic measures.
Programming : I designed a video game using Java and I designed a simulation of an online payment system with C language.
Use of Matlab.
Programmation with VHDL-AMS.
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The Global Management Challenge, Euromanager 2007-2008
- Team Captain
2007 - 2008
Captain of ESIEE team sponsored by HOBSONS FRANCE, ranked fourth in the national semi-finals group of the challenge 2007-2008.
Managed a virtual company which conceives, sells 3 kinds of products thanks to 3 markets : UE, ALENA and the Internet. Created a piece of software with EXCEL to manage the 5 parts of the company : R&D, Production, Marketing, Human Resources and Financial aspect.
