Pramod UDUPA

En résumé

Entreprises

• Intel - Logic Design Engineer

  Meudon 2016 - maintenant

• Signalchip Innovations Pvt. Ltd - Design Engineer

  2014 - 2016

• Indian Institute of Science, Bangalore - Research Assistant

  2008 - 2010 Acceleration of Numerical Linear Algebra Kernels on FPGA/Reconfigurable System.
  Two international conference publications

• NXP Semiconductors - Internship

  Colombelles 2008 - 2008 Power planning strategy for sizing power grid for a complex SoC
  Description In this thesis, a power planning strategy for sizing the metal widths for power supply was designed. The metal widths are calculated based on constraints like maximum IR-drop, maximum metal width available at a particular layer. The methodology was tested on two real large SoC designs for its validation.

Formations

• IRISA/INRIA Rennes

  Rennes 2011 - 2014 Doctor of Philosophy
  
  Working on real-time 100Gbps CO-OFDM System
  Published International conference papers (ICC, VTC) and submitted to journals

• Birla Institute Of Technology And Science (BITS)

  Pilani 2006 - 2008 Master of Engineering
  
  Skills acquired : Digital Circuit Design, Analog Circuit Design, Computer Architecture Design, Verilog HDL, VHDL, Tcl
  
  Subjects : Digital VLSI, Analog VLSI, Computer Architecture, CAD for VLSI.
  
  Status : Degree obtained, CGPA - 9.2/10

• M S Ramaiah Institute Of Technology

  Bangalore 2002 - 2006 Bachelor of Engineering
  
  Skills acquired : Analog & Digital Circuit design & analysis, Digital signal processing system analysis, C/C++, Matlab, Assembly Programming
  
  Subjects : Network Analysis, DSP, Digital Communication, Microcontrollers
  
  Degree : Obtained, Percentage - 81 %

Réseau

• Alexandre SAVALLI

• Hugo HAMEL

• Mario PICARD

• Vaibhav BHATNAGAR

  Alcatel-Lucent International (Nozay)