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Sophie PUGET

CROLLES

En résumé

- General: Research & development project
Synthesis mind and autonomy
Silicon technology, modeling (physical mosfet model: BSIM and PSP), simulation, electrical characterization
- Computer knowledge: Office, Mathcad, C, Sentaurus Workbench, Cadence, Eldo, Iccap

Mes compétences :
Innovation

Entreprises

  • STMicroelectronics - Spice modeling engineer

    2010 - maintenant Spice modeling engineer on fully depleted SOI (28nm-20nm node) and on partially depleted SOI (130nm node)
  • STMicroelectronics - PhD student / Engineer

    2006 - 2009 PhD student on Thin Film Capacitorless eDRAM for « System on Chip » Applications

    - Memory device technological development: layout, process and electrical characterization
    - Cointegration: silicon CMOS platform overview
    - Simulation and modeling: parasitic effects (quantum and SCE), floating body effect, memory operations and data retention
    - 4 patents
    - 12 scientific publications national, international conferences and papers

Formations

Réseau