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Ashwani SINGH

Rueil Malmaison

En résumé

Ingénieur/ docteur en communication numérique et Développement Système Embarqué

Compétences Fonctionnelles:

Gestion de Project
Management d’équipe
Capacité rédactionnelles : synthèse, rapport, article (Anglais)
Coordination

Compétences Technologiques:

Métiers
-Communication numérique
-Forward Error Correction
-Système embarqué

Maîtrisés :
- C/C++
- RTL Coding (VHDL), System Modeling using SystemC,
- Xilinx ISE, Altera Quartus II, Modelsim,
- Evaluation Boards Virtex-5, Virtex-6, Spartan-6
-8051µC, PIC32 Microcontroller
-Lab Instrumentation (Oscilliscope, Logic Analyzer)

Connus : - System Simulation Tools: Signal Processing Workstation (SPW), Matlab
- Kile uVision4, TI Code Composer Studio
-Synopsys Design Compiler
-XML, Java

Mes compétences :
Communication
Communication numérique
Correction
Management
Management d'équipe
Management d’équipe
Microsoft Project
Microsoft Project Management
Système embarqué

Entreprises

  • Schneider Electric - Senior Firmware Designer

    Rueil Malmaison 2014 - maintenant

  • Alten - Consultant Sénior en Systèmes Embarqué / Temps Réel

    Boulogne-Billancourt 2012 - 2014

  • Navtel Systems - Ingénieur études et développement

    2010 - 2012 Involved in Wireless system development for aeronautics and space sector. Key Experience: FEC, Synchronization, DVB-S2 Modem Implementation, WSN, Project Management

  • VLSI Lab, Politecnico di Torino, Italie - PhD Researcher

    2007 - maintenant Methods and VLSI Architectures for flexible channel decoders (During PhD studies):
    • Evaluated, NoC architectures for MPSoC based Turbo and LDPC decoder architectures.
    • Developed, a new approach of extrinsic memory saving in Turbo decoder architectures.
    • Developed, a new metric for fast and efficient performance evaluation of iterative decoding
    algorithms.
    • Design and implementation of a flexible platform which supports the various channel decoding algorithm used in current wireless standards viz. Viterbi, Turbo and LDPC.

  • PARADES , Italie - Intern

    2006 - 2006 SystemC Models and infrastructure for Distributed Embedded System Simulator
    • This Project was part of my master degree stage work at PARADES ,Rome. It involved SystemC Model Builder which automaticlly instantiates and binds IPs by reading from a SPIRIT based XML description of IPs.

  • C-DOT, Inde - Ingénieur études et développement

    2003 - 2005 Wireless System Development at C-DOT, Bangalore (India):
    • Software development on TMS320 DSP Processors(C/Assembly) for physical layer algorithms in 3G basestation transceiver.
    • Firmware development (Altera) for Radio Interface of baseband card of 3G basestation (3GPP).
    • Hardware development of Mixed Signal boards using Mentor Graphics Board Station.
    • Developed real and fixed point simulation model in SPW for the modem for GSM systems.
    • Firmware development (Altera) of the transmit pulse shaping filter, IF chain, modulator, and soft output viterbi equalization block for the modem of GSM systems.

  • Samsung Inde - Ingénieur études

    2002 - maintenant Work involved testing of Digital Television circuitry.

Formations

  • Politecnico Di TORINO Polito (Turin)

    Turin 2007 - 2010 Doctorat

Réseau

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