En résumé

• 15+ years of experience driving large scale Low Level SW projects in an international environment
• Expert in Validation, Debug , Analysis and Reporting with excellent C coding skills
• Linux Kernel development Drivers (USB)
• Permanently pushing for efficiency and innovation, successfully deployed novel methodologies
• Strong Low Level SW background for the semiconductor industry
• Good communication skills and team spirit with ability to work in multi-cultural environments

Languages and SW Environments:
• C
• ARM Assembler (32 and 64 Bits)
• System Verilog
• Clearcase, ICM
• Linux Basic Knowledge, TCL, Perl

FPGA Pre-Silicon Prototyping:
• Zebu (Synopsys)
• HAPS (Synopsys)
• Virtual Prototyping (Synopsys)
• Veloce (Mentor Graphics)

Debug Tools:
• Lauterbach
• Code Composer Studio

Pre-Silicon Tools
• Modelsim

Laboratory Tools:
• Tektronix DPO/TDS Scopes and AWG Data Generator
• Agilent MSO Scopes

Protocols Analyzers:
• USB Lecroy Voyager/Advisor
• USB Beagle 5000
• SATA Bus Doctor

Multi-Cultural Frame Work
• Work with Korean Teams
• Work with Chinese Teams
• Work with US/India Teams
• 2 months in San Diego (CA)
• Customers Support


  • Intel - Pre and Post Silicon Validation Engineer

    Meudon 2015 - maintenant
  • Samsung Electronics - System and Silicon Validation Engineer

    Saint-Ouen Cedex 2013 - 2015
  • Texas Instruments - SATA Software Development, Validation and Debug on OMAP5 platform

    Villeneuve-Loubet 2012 - 2013 -> Software Functional Drivers Implementation
    -> Validation on Board
    -> Plan Definition, Reviews and Schedule Definition
    -> Expertise on standards for SATA (ATA, ATAPI)
  • Texas Instruments - USB3 and USB2 Software Development, Validation and Debug on OMAP5 and OMAP4 platforms

    Villeneuve-Loubet 2009 - 2012 -> Software Functional Drivers Implementation
    -> Validation on Board
    -> Plan Definition, Reviews and Schedule Definition
    -> Expertise on standards for USB3.0, Device and Host (xHCI)
    -> Expertise on standards for USB2.0, OTG1.3, ULPI, UTMI, EHCI, OHCI
    -> Super Speed Electrical Certification (Eye Diagram, Spread Spectrum Clocking…)
    -> High Speed Electrical Certification (Eye Diagram, Golden Tree…)
    -> Power and Performances Tests and Analysis
    -> Work with SW people to integrate patches in Android Release
    -> Notions of PCI Express (For Pre-Silicon Study for another platform)
  • Texas Instruments - Functional Validation on Modem Devices

    Villeneuve-Loubet 2006 - 2009 Software Functional Drivers, Validation on Board, Plans Definition, reviews and schedule definition for several features like:
    -> Memory Interfaces (DDR, SDRC, NAND)
    -> USIM, 3G Topics (Notions of HSPA and WCDMA)
    -> Power Management
    -> I2C, SPI, Boot Secure, DMA.
    -> Tests Automation
  • Texas Instruments - Design Verification and SW Validation on Modem Devices

    Villeneuve-Loubet 2002 - 2006 Design Functional Verification (RTL and GATE Simulations), Validation on Board, Plans Definition, for several features like:
    -> UART/IrDA and Basic Serial Interfaces
    -> DSP C64xx
  • Texas Instruments - Specification Reviewer for OMAP1610 Modules

    Villeneuve-Loubet 2001 - 2002 Contractor via STUDIEL Company

    -> Within the OMAP Architecture Division
    -> Technical Specifications Reviewer OMAP Modules delivered by Architects like
    DMA, Memory Interfaces, GPIO …
  • IBM - Microelectronic Engineer

    Bois-Colombes 2000 - 2001 Contractor via ASTEK Company

    -> Within the IBM Microelectronic Division
    -> Design and Verify IPs components for Data Packet Routing (UDASL switch).
    -> Implement Robustness and Stress Tests
    -> Put in place Automation and Optimization Tests
  • Thales Avionics (Ex Thomson CSF Detexis) - Software Engineer

    Courbevoie 2000 - 2000 Secure Tests for Military Plane RAFALE F1 for DASSAULT AVIATION

    -> Within the Avionic Division
    -> Software Implementation for Display Attack for Aircraft Touch Screen
    -> Tests Specifications Definition and Validation (“V-Cycle”),
    -> Real Time Tests on Simulation Platform (Power PC)
    -> "Confidentialité Defense” Ability
  • I3S laboratory (Sciences University of Nice) - Engineer School Internship

    1999 - 1999 Vector Quantization for Satellite Image Processing (Wavelet Transform)

    -> Collaboration with CNES (Centre National d’Études Spatiales)
    -> Develop Best Image Compression for the 3S2 satellite
    -> Compare Study between Scalar Quantization to Vector Quantization.