Project Leader (System Level Design engineer in System Platform Group “SPG”):
“STMicroelectronics: - Tunisia''.Array
R&D: “Defining, Implementing, and Deploying the specification driven hardware design flow now used in most ST complex designs: This flow enables ST to reduce its costs, defects and delays by avoiding duplicate capture of information, e.g. enabling the Design divisions to provide there specifications 4 months earlier or reducing the number of people needed for the register documentation of the mobile multimedia division”.
During my degree I successfully combined my studies with work and other commitments showing myself to be self-motivated, organized and capable of working under pressure. I have a clear, logical and open mind with a practical approach to problem solving and a drive to see things through to completion. I enjoy working on my own initiative or in a team. In short, I am reliable, trustworthy, hardworking and eager to learn and have a genuine interest in professional world.
Pas de formation renseignée