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Patrice VENANT

MONTREAL

En résumé

A Senior Embedded Software/Hardware Designer with a wide range of experience in the Wireless/Security/Audio/Video Media domains. Proven leadership skills involving managing, leading and motivating worldwide teams to achieve their objectives.
Strong facilities to work with Asian, European and American colleagues.
Spécialités

Mes compétences :
C
DSP
C Programming Language
leadership skills
develop a GSM baseband chip platform
Verilog
VLSI
VHDL
UNIX
Smalltalk
Perl Programming
Matlab
Linux
LAN/WAN > WLAN
GSM
Eiffel
Cadence Software
C++
C More or Less

Entreprises

  • MSTAR Semiconductor Inc. - Senior Verification Digital Designer

    2000 - maintenant * Verification Modem PLC Network :
    Led validation and verification of hardware design (VHDL) versus the signal processing modeling (Matlab). Reports bugs. New architecture on verification process, use software Oriented Object technics. Install SystemVerilog / UVM methodology around the PLC modem.

    * Project Cryptographic Processor (collaboration with Taiwan)
    Led new cryptographic processor specification for embedded security purpose for Set Top Box.
    Managed embedded DRM software (C/C++) from user linux space through kernel module to dedicated cryptographic CPU. Led specification + developing hardware + developing firmware drivers + software designkit tools.

    * Project MAC Core : the MAC IEEE802.11 (collaboration with Taiwan and Paris)
    Led new architecture of MAC 802.11 low layer. Designed Verilog hardware to follow real-time software constraints. Validating with co-simulation HW-SW layer stack.

    * Project WLAN : HIPERLAN2 / 802.11a / 802.11b / 802.11g Modem (600kgates)
    Designed RTL & C Model of the OFDM preamble detection. Led WLAN Team designers.
    Collaborated between software and hardware development team. Optimized the process flow to take care of C model versus RTL specifications. Tracking bugs...

    * ARM946E-S Core (collaboration with Italy)
    Led ARM946 Core hardening, ETM9, JTAG. Designed co-processor GSM encryption, interface sharing DSP and CPU. Wrote RTL and specifications.

  • MSTAR Semiconductor Inc. - Senior Architect Digital Designer

    2000 - maintenant * Verification Modem PLC Network :
    Led validation and verification of hardware design (VHDL) versus the signal processing modeling (Matlab). Reports bugs. New architecture on verification process, use software Oriented Object technics.

    * Project Cryptographic Processor (collaboration with Taiwan)
    Led new cryptographic processor specification for embedded security purpose for Set Top Box.
    Managed embedded DRM software (C/C++) from user linux space through kernel module to dedicated cryptographic CPU. Led specification + developing hardware + developing firmware drivers + software designkit tools.

    * Project MAC Core : the MAC IEEE802.11 (collaboration with Taiwan and Paris)
    Led new architecture of MAC 802.11 low layer. Designed Verilog hardware to follow real-time software constraints. Validating with co-simulation HW-SW layer stack.

    * Project WLAN : HIPERLAN2 / 802.11a / 802.11b / 802.11g Modem (600kgates)
    Designed RTL & C Model of the OFDM preamble detection. Led WLAN Team designers.
    Collaborated between software and hardware development team. Optimized the process flow to take care of C model versus RTL specifications. Tracking bugs...

    * ARM946E-S Core (collaboration with Italy)
    Led ARM946 Core hardening, ETM9, JTAG. Designed co-processor GSM encryption, interface sharing DSP and CPU. Wrote RTL and specifications.

  • VLSI Technology Inc. - Digital Designer

    Buc 1994 - 2000 * SCP Project Management - Standard Communication Platform (collaboration with Japan/USA)
    Led 5 designers to develop a GSM baseband chip platform, mix-signal, ARM, OAK cores - 900K gates for 500 pins.

    * Development Worldwide Design Flow (collaboration with USA)
    new VLSI technology tools flow, Integrated new tools in a new technology (VHDL/Verilog to Place & Route). Worldwide activity. Special effort made on timing back-annotation with VLSI internal delay calculator. Collaborated with American team based in VLSI San-Jose (CA).
    > All VLSI chips were directly impacted by my success work.

  • VLSI Technology Inc. - Digital Designer

    Buc 1994 - 2000 * SCP Project Management - Standard Communication Platform (collaboration with Japan/USA)
    Led 5 designers to develop a GSM baseband chip platform, mix-signal, ARM, OAK cores - 900K gates for 500 pins.

    * Development Worldwide Design Flow (collaboration with USA)
    new VLSI technology tools flow, Integrated new tools in a new technology (VHDL/Verilog to Place & Route). Worldwide activity. Special effort made on timing back-annotation with VLSI internal delay calculator. Collaborated with American team based in VLSI San-Jose (CA).
    > All VLSI chips were directly impacted by my success work.

  • PRODIX - Engineer

    1992 - 1993 * 3D View / Graphical interface oriented object. 'C' + Smalltalk.
    Develop C code mixed with Oriented Object GEMSTONE.

  • PRODIX - Engineer

    1992 - 1993 * 3D View / Graphical interface oriented object. 'C' + Smalltalk.
    Develop C code mixed with Oriented Object GEMSTONE.

Formations

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