Thierry YAO

2000-present: Integration Engineer specialized in Non-Volatile Memories at AMI-Semiconductor Belgium BVBA. Annual net income : €37200. Annual gross income : €66700.
My global mission is to be the NVM expert in the department of technology integration. Therefore, I have to provide solutions, specifications and figures to internal as well as external customers.
Responsible for the yield improvement and final production release of an embedded EEPROM for the I2T100 0.7mm, 100 volts technology and technical support to customers.
Responsible for the integration of the HIMOSTM cell in the I3T80 embedded flash technology (0.35mm, 80 volts). That project includes support to process, design, test, quality-and-reliability and product-and-yield departments. The different responsabilities I had along the project are :
o creation, design and development : components (high voltage transistors, memory cell), basic test structures, analog blocks (complex test structures, architecture of the memory array), electrical simulations and layout (Mentor).
o process integration : DOE (JMP), FMEA, 8D, e-test, CpK, wafer lots follow-up.
o electrical charaterization using probers, semiconductor analyzers, automation using LabView/Perl and analog testers (Catalyst).
o analysis and specification of reliability performances.
o yield improvement and ramp-up.
I’m the first inventor of the FREEPROM, a Non-Added STep EEPROM (NASTEE) having high reliability features (near zero disturb, moving bits immunity). I have designed the memory cell and its architecture for AMI-Semiconductor’s I3Txx technology platform.
Responsible for reliability of all NVM technologies. I have implemented the reliability methodology. I’m the first conceptor of a procedure to predict failures of extrinsic memory cells which has been validated over 2 years of data retention.
External missions: Member of the scientific committee of the 1st International Conference on Memory Technologies and Design (ICMTD). Member of the European project “Failure driven Quality” (FdQ) to define the R&Q specifications for the automotive industry especially on the NVM part.

1997-2000: PhD in development and design of Non-Volatile Memory dedicated to RFID applications. Work performed at the french laboratory of LETI in CEA-Grenoble. PhD delivered by the french grande école d’ingénieur : “Ecole Nationale Supérieure des Télécomunications de Paris” in 2002.
1996-1997: Preparation to the Aggregation of Mathematics.
1994-1995: Master of Science in Physics of Semiconductor delivered by the University of Lyon.
1992-1995: Master of Science in Electronics Engineering delivered by the French grande école d’ingénieur: “Ecole Centrale de Lyon”.
1990-1992: Bachelor of Science delivered by the University of Grenoble.

Mes compétences :
Design
Design of Experiment
Endurance
Flash
Intégration
Memory
Process
Process control
Process intégration
Rétention
Semiconductor
Statistical Process Control