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Abdellatif AZAKKOUR

Boulogne Billancourt

En résumé

19 YEARS OF EXPERIENCE IN THE HIGH-TECH ELECTRONICS INDUSTRY, WORKING AS ANALOG/RF IC DESIGN & (LAYOUT) ENGINEER, TEAMLEAD AND PROJECT MANAGER.

Expertise ranging from transistor level to system level, and spanning in a wide variety of wireless communication standards from 100MHz to 20GHz (UWB, xDSL, GSM-DCS-PCS...).

Manager experience (resourcing, recruitment, reporting ...)

IEEE Published papers
International conferences

Spécialités:
Analogue/RF IC design & Custom IC layout in bipolar/CMOS technologies with expertise in mixers, filters, oscillators, PLLs.

Experienced ASIC Designer with experience of all aspects of the ASIC design flow, from design specification to Layout.

Skills in RF testing and design methods.

Tools:
CADENCE (Analog Artist - Virtuoso - Composer - Spectre RF - Ocean),
MENTOR (Design Manager - Design Architect, Eldo, IC station, Calibre XRC),
Agilent (ADS, Golden. Gate, Momentum),
Ansoft (HFSS),
Matlab, Scilab

Mes compétences :
ASIC
Cadence
CMOS
Electronique
Layout
Microélectronique
PLL
RF

Entreprises

  • Huawei - Senior Analog / RF IC Design & Layout Engineer (Contractor)

    Boulogne Billancourt 2016 - 2018 CONSULTANCY WORK FOR THE DEVELOPMENT OF THE NEXT GENERATION OF RF MMWAVE TRANSCEIVERS SUPPORTING 5G PROTOCOLS

  • Huawei - Senior Layout Engineer (Contractor)

    Boulogne Billancourt 2015 - 2016 CONSULTANCY WORK FOR THE DEVELOPMENT OF AN RF FRONT-END MODULE SUPPORTING 4G PROTOCOLS

  • Huawei - Senior Layout Engineer (Contractor)

    Boulogne Billancourt 2015 - 2015 CONSULTANCY WORK FOR THE DEVELOPMENT OF AN RF TRANSCEIVER SUPPORTING 5G PROTOCOLS

  • Huawei - Senior Analog / RF IC Design & Layout Engineer (Consultant)

    Boulogne Billancourt 2014 - 2015 CONSULTANCY WORK FOR THE DEVELOPMENT OF THE NEXT GENERATION OF RF TRANSCEIVERS SUPPORTING 2G, 3G AND 4G (LTE) PROTOCOLS. (CMOS 28nm)

    • In charge of the design, simulations, layout and reports of the Direct Digital RF Modulators (DDRM) biasings: noise and INL/DNL current steering DAC optimization
    • DDRM linearity investigation

  • CEA-LETI - Senior Analog / RF IC Design and Layout Engineer (Consultant)

    GRENOBLE 2013 - 2014 CONSULTANCY WORK ON FEASIBILITY STUDY, DESIGN AND LAYOUT OF A POWER AMPLIFIER FOR INTERNET OF THINGS APPLICATION (CMOS 65nm)

    • Design of a power amplifier (869MHz) that can provide a scallable output power from -40dBm up to 14dBm with a high linearity
    • Layout, parasitic extractions and post-layout simulation

  • CEA-LETI - Lead Analog / RF IC Design & Layout Engineer (Consultant)

    GRENOBLE 2012 - 2013 CONSULTANCY WORK FOR THE DESIGN OF A REMOTE POWER SUPPLY (NFC–UHF) SOC RF UWB-IR 8GHZ TRANSCEIVER FOR HIGH DATA-RATE TRANSFER APPLICATION (HIGH DATA-RATE RFID - 108MBPS) (CMOS 130nm)

    - Supervising design and layout engineers (6 engineers)
    - Project planning, task management and reporting to the top manager
    - In charge of the design, simulations, layout and reports of the UWB-IR 8GHz transceiver for specific blocs (Matching network, 8GHz balun, Super-Regenerative Oscillator, peak detector, amplifier with threshold control, high speed comparator, quench current generator, DLL, ...)
    - Chip integration / top-level verification and supervise top-level tape-out preparation
    - Design of PCB schematic and measurement support

  • Trixell (Joint venture Thales/Philips/Siemens - Responsable de lots ASICs

    2009 - 2009 IN CHARGE OF THE ASIC CMOS DESIGN DEVELOPMENT OF A DIGITAL X-RAY FLAT PANEL DIGITAL DETECTOR

    - Specifications to validation of prototypes,
    - Technical support (design, layout, measurement),
    - Close monitoring of project partners and subcontractors.

  • Sorin CRM - Senior Analog / RF IC designer and Layout Engineer (Consultant)

    2009 - 2012 CONSULTANCY WORK IN ANALOG AND RF IC DESIGN FOR IMPLANTABLE PACEMAKERS AND DEFIBRILLATORS
    (CMOS 130nm)

    - Setting up of new design flow with Mentor to do analog, RF, mixed simulations, designs and layouts in the same environment,
    - In charge of simulations of the transceiver that include DAC, Mixers, PA, LNA, complex polyphase filter, RSSI, matching ...
    - Measurement support,
    - Design and Layout of low power SAR ADCs 10bits

  • ARTIMI Ltd (Cambridge, UK) - Senior Analog / RF IC designer and Layout Engineer

    2005 - 2008 IN CHARGE OF DESIGN DEVELOPMENT OF ULTRA-WIDEBAND (OFDM) TRANSCEIVER FOR WIRELESS APPLICATION (BiCMOS SiGe 0.18u, ft=150GHz), OPERATING BETWEEN 3-10GHz.

    Artimi is the fabless semiconductor company leading the development of low power single chip WiMedia-based Ultra Wideband (UWB) silicon solutions for applications based on Certified Wireless USB and next generation Bluetooth over UWB. Artimi's dual-band WiMedia based UWB products are complete system solutions, including radio, baseband, MAC, I/O and software, which are firmware upgradeable to enable dual-band operation to meet global regulatory and application requirements. Artimi’s low power highly integrated semiconductor products are ideally suited for power sensitive consumer, communication and peripheral devices.

  • ACCO SA - Senior Analog / RF IC designer and Layout Engineer

    1999 - 2005 Development of IP blocks and prototypes (LNA, Mixers, PLL, Transceivers)

    Acco is an independent design house providing a valuable solution to the shortage of high skill design engineers in ASIC, ASSP and IP markets. Over the years, Acco has become a trusted partner of several OEMs and semiconductor vendors in Europe.
    Acco is a company created in 1994 with high-tech know-how. Its designers, with a master or a Ph.D. degree in Electronics and Computer Science, have several years of experience in the design and engineering of full custom integrated circuits, mixed analog-digital ASIC's, integrated sensors, A/D and D/A converters.

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