Esterel Technologies
- Technical Lead : HW RTL Verification, Pre / Post silicon Validation for Texas Instrument
ELANCOURT
2002 - 2009
In charge of the Validation Plans, setup and boot the system, SW environment setup and delivery, interface with architects and environment team, follow up complex system item ( Low Power mode, DMA, security, multiple peripherals interfaces …) up to full platform (Application IC + Power companionship + Audio IC)