Travaillant dans le domaine de la microélectronique, et plus particulièrement sur la microfabrication de transistors monoélectroniques pour une intégration 3D de circuits hybrides SET-CMOS
Mes compétences :
CMOS
Transistors
ICP
Entreprises
Interdisciplinary Institute for Technological Innovation
- Ph.D. candidate
2011 - maintenant* Fabricated and characterized single electron transistors with sub-attofarad capacitances ;
* Implemented novel ICP plasma etching processes for metallic and dielectric shallow nanostructures
(TiN, SiO2 and Si3N4)
* Integrated nanowires fabricated with a damascene process in the BEOL of a CMOS chip ;
* Developed in-house electrolithography process for negative (HSQ) resist with low energy beam
exposure and obtained 13 nm wide lines
* Trained and supervised a number of students on clean-room machines
Nanofabrication and Nanocharacterization Research Center
- Trainee Engineer
2010 - 2010* Developed a plasma etching process for the fabrication of 20 nm wide titanium nanostructures