François LINANT


En résumé

Management de Projets (certification PMP).

Validation de terminaux dans les télécoms.

Développement en Electronique Numérique (ASICs et FPGA) et analogique (dans les domaines de l’Espace, de l’Automobile et de l’Electronique Grand Public).

Mes compétences :
Gestion de projet


  • THALES Communications & Sécurity - Common Critetia Security Evaluator

    Colombes 2013 - maintenant
  • Motorola - Senior Field Test & Validation Engineer

    Gif sur Yvette 2004 - 2013 Test and Validation of Mobile User Equipment for Field Interoperability & Test team in EMARA
    • Analysis of software on phones with different OS (Android, P2K, Windows Mobile, Linux Java and ODM) before their launch in European markets under LTE, WCDMA, HSxPA. Execution of tests concerning different features with TestCentral and, follow up of Change Requests (bugs) with developers for correction into the software for final validation.
    • Technical support for contractors in FIT team during test execution.
    • Follow up French issues observed by testers in France for a quick analysis and provide regular status to the teams in charge of validation for the operators.
    • Test cases development for new Feature on new products for EMEA and for Escaped defects during test activity.
    • Development of a quality tool (in Visual Vasic) for the evaluation of all contractors in EMEA.
    • Team management for France (by interim) by leading the team and planning activities of FIT with urgent extra requests like mobility tests or laboratory tests.
  • Tharsys - Trainee Designer Electronic Board

    2004 - 2004 Development of embedded system in vehicles for the geolocation by GPS, and for the upload of different information through GPRS to a fixed station.
    • Drafting documents of specification and design.
    • Development under PROTEL and design of the product.
  • Sterela - Electronic Engineer

    Pins-Justaret 2002 - 2002 Contractor (Ajilon)
    Development of CPLD with usage of ISE WebPack Software.
    • Development of CPLDs XILINX CoolRunner.
    - Coding in VHDL, Validation through ModelSim and Implementation.
    - Drafting Technical documents.
  • Philips Semiconducteurs - Microelectronic Engineer : Integration and validation

    2000 - 2001 Contractor (Ajilon) For PHILIPS - Caen (14)
    Development of an integrated circuit on 0.18um technology.
    • Integration : Creation of an interface for reading and saving digital data and their validation by Cadence and synthesis through Ambit.
    - Importing synthesized files through the Quickturn complier and partitioning the blocks on the FPGA’s cards.
    - Validation using Quickturn.
    • Module testing for analysing the data
    - Validation of the different operational modes of reading or writing of data on Cadence Affirma NC Simulator.
  • Ajilon - Microelectronic Engineer

    2000 - 2002 Contractor for Philips Semiconductors and for Sterela
  • LESIA - Trainee designer ASIC

    1999 - 1999 Portable design of ASICs with high reliability for space applications (SPOT5 (CNES)) in technology 0.8u (DMILL) and 0.7u (MIETEC ) with corrective and redundancy actions.
    • Development VHDL and verilog, Validation and layout of circuit with Cadence and Synopsys at “AIME”