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Arnaud ANOTTA

Grenoble

En résumé

Pas de description

Entreprises

  • EASii IC - Test/Characterization/DFT engineer

    Grenoble 2008 - maintenant oTest and characterization engineer at Xrel / France (EASII IC subcontractor):
    - Test and characterization of analog circuits for high reliability applications under labview environment (-60 to 300̊ C). Test board design (HTOL/production) and test flow definition.

    oTest engineer at STM Crolles / France (EASII IC subcontractor):
    Generation of SRAM test programs on Verigy HP93K tester. Characterization and functional validation of SRAM testchips.

    oDFT engineer at STM/STE Grenoble / France (EASII IC subcontractor):
    - Generation, simulation and optimization of test patterns under tetramax. Test engineering team support, analysis of field returns. Creation of DFT support tools in C++. Scan insertion, functional verification (under modelsim).
    - Xilinx FPGA programmation for customer demo. Design of IPs for CAN serial communication protocol.
  • NXP - Test and Product engineer

    2002 - 2008 Generation and debug of test programs for eDRAM,SRAM and FLASH testchips on Teradyne J971/J973 and on Verigy HP93K. Characterization, qualification, failure analysis support, soft error tests. Customer support to different business lines. Bist programming in assembler language.
  • Gemplus - Product engineer

    Meudon 2000 - 2002 Generation and debug of test programs for eDRAM,SRAM and FLASH testchips on Teradyne J971/J973 and on Verigy HP93K. Characterization, qualification, failure analysis support, soft error tests. Customer support to different business lines. Bist programming in assembler language.

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