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Nicolas CHAUVE

Meudon

En résumé

Mes compétences :
Téléphonie mobile
Management
Architecture informatique
Architecture logicielle
Electronique embarquée
Leadership
IOT
Ingénierie système
Architecture
Google Android
RTOS
Intellectual Property Law
Requirement Management
Marketing
JIRA
C++
Business Development
procurement management
most of the design
develop innovation acumen
develop business management
battery management
Wi-Fi
VHDL
Texas Instruments Hardware
Team Management
Scrum management
SOC design
Risk Management
Rational ClearCase
Quality Control
Python Programming
Project data management
Project data analysis
Power management
Perl Programming
PC Hardware
Microsoft SharePoint
Microsoft Excel
IP
Electrical Engineering
Data Mining
DSP
Cost Analysis
Configuration Management
C Programming Language
Bugzilla
Android
Analysis of product feasibility and competitivenes
Advanced RISC Machine (ARM)
ASIC
3G Networks
2G Networks

Entreprises

  • Intel - IOT system lead architect

    Meudon 2013 - maintenant IOT-Wearable System & SW Architecture lead ( ): IOT-New Devices Group/Device SW group
    I am leading device system architecture in Internet-Of-Things (IOT) SW group, defining next generation platforms. My charter includes:
    * Defining with Product Marketing the platform requirements and assessing technology introduction ;
    * Specifying a scalable platform architecture: Software , System-On-Chip(SOC) and reference designs ;
    * Driving SOC and SW architects to meet consistency, functionalities, performances, power and cost goals. ;
    * Managing handover between architecture definition and SW development phases

    In parallel, I had also a SW development lead role on two projects, managing the Firmware development of a Wireless power transmitter as well as a wearable device Wireless Power receiver (A4WP-Rezence technology).
    Achievements:
    * Delivered scalable architecture covering three generations and five platform segments (from RTOS to Android based platform).
    * Delivered architecture for the integration of NFC, Secure Element , Cellular Modem and Wireless Charging technologies to IOT Wearable platforms
    * Recognized as the main system architecture contributor to Intel Wearable platforms and SOCs definition.

    My contribution to Intel Wearable roadmap and platform developments has been recognized through the promotion to Intel Principal Engineer position.
  • Intel - SW architecture Manager

    Meudon 2009 - 2013 Mobile System SW architecture Manager ( ): Mobile Communication Group
    I managed the System SW Architecture team, in charge of Android Smartphone and tablet SW architecture. My mission consisted in:
    * Management of cross-domain System SW architecture activities, organized around Platform Architect leads , Power and Performance architects , Connectivity architects and System Analysis groups
    * Developing team activities and improving team recognition in a complex multi-sites and multi-BUs context
    * Creation and development of a continuous architecture improvement team through post-mortem defect analysis.
    * 3rd party outsourcing management

    Before taking a manager role and then in parallel to it, I've also been in charge of Cellular Modem system integration into Intel Mobile platform.
    Achievements:
    * Developed team from 8 to 25 SW architects, promoting group leaders and solidifying group charters. Team recognized as a gang of top talents by Intel peers
    * Fixed team internal motivation and recognition problems
    * Fixed interaction challenges with other teams and got groups recognized for their expertise , contribution to programs as well as for the quality of the deliverables ;
  • Texas Instruments Inc. - Platform & Device Architect Manager

    Villeneuve-Loubet 2008 - 2009 Texas Instruments Inc. (Villeneuve-Loubet- France): Wireless BU Hardware Development Group
    I managed the HW Product Architect team, in charge of platform & SOC architecture definition. My mission consists in
    * Developing team members technical and management skills.
    * Deploying architecture analysis techniques to handle increasing projects complexity
    * Organizing interaction with SOC development teams to improve global development process efficiency.
    * Defining and deploying processes and tools supporting architecture definition activities.
    The team is covering a wide range of System & Hardware architecture topics, including:
    * Connectivity : 2G/3G , WIFI , BT, FM ;
    * low power optimization: MP3 audio player, power management architecture ;
    * High-Performance processing: 1080p videos encode, 16Mpixel Still Imaging. ;
    * Cost optimization: Low-cost Wireless + Multimedia chipset solution ;
  • Texas Instruments Inc. - Technical Product Manager

    Villeneuve-Loubet 2003 - 2008 Texas Instruments Inc. (Villeneuve-Loubet- France): WTBU Program Management Office
    I owned technical definition of six Wireless modems and Multimedia chipsets, covering:
    * Technical products definition working closely with marketing and customers.
    * Management of technical communication and alignment with customers.
    * Cross-functional team management, in charge of architecture analysis, performance modeling and device specification. Team size was in the range of 10 to 30 persons.
    * Definition of the execution plan with R&D team managers (IC design, Software, Reference platform, documentation)
    * Driving, coaching and challenging the IC development teams to achieve product performance & cost on schedule.
    Achievements:
    * I improved Time-To-Market through faster product definition and IC specification development cycle. Three out of six products I managed are considered as benchmark for specification phase duration.
    * I optimized R&D spending and improved products value by driving trade-off on features and performance with both customers and IC development team.
    * I defined, developed and deployed processes and associated tools to improve product definition efficiency and quality: Change-Control, Specification review, Customer Repository system, Risk management system
    Two patents filled: US 2006/0190691 A1
    and US 2005/0258546 A1
  • Texas Instruments Inc. - SOC program manager

    Villeneuve-Loubet 2001 - 2003 Texas Instruments Inc. (Villeneuve-Loubet- France): WTBU-Wireless Computing group
    Program manager, in charge of the single chip Cellular Modem + Application processor SOC developments (TI OMAP710™, OMAP730™ and OMAP850™ chips): covering full development lifecycle, from device specification to SOC design, validation up to device qualification and ramp to production. Management and coaching of the IC design and verification teams (20 persons).
    Achievements:
    * I developed a strong team spirit, pushing consistently for innovation to improve productivity, quality and develop the engineers' skills.
    * OMAP710 device was considered as a benchmark in TI wireless organization for the development flow, the device testability, and for the design team efficiency.
    * OMAP7xx chipset family has been awarded by Semiconductor Insight™ as the 2003 most innovative System-On-Chip. The device has been a best seller during 5 years with cumulated revenue of $300M. ;
  • Texas Instruments - System-on-Chip Design leader

    Villeneuve-Loubet 1998 - 2001 In charge of two SOC designs, I organized the technical activities and coached the team (10 persons). Many innovative techniques have been developed during the two projects and are now used by several TI design group (behavioral synthesis, static timing analysis, advanced DFT technique)
  • Texas Instruments - ASIC IP designer

    Villeneuve-Loubet 1996 - 1998 Texas Instruments Inc. (Villeneuve-Loubet, France): WTBU- Chipset group
    I specified and developed:
    * A Hardware accelerator for Mobile phone (IS95A) channel decoding ( Viterbi decoder).
    * TI wireless peripheral interconnect bus in order to promote re-use and facilitate system-on-chip design.
    * Several IPs (DMA controller, ARM7 memory controller, Spread-Spectrum Noise PWM, FIR ).
    Two patents granted: 6457074
    and 6636907
  • PHILIPS Research Lab - Research engineer

    1995 - 1996 I was in charge of digital Terrestrial TV (DVB-T) modem architecture definition. I focused my research on a DVB-T receiver algorithms and architecture definition: Development of a reference Bit-exact C model, analysis of SW/HW partitioning, definition and validation of a DVB-T modem. I also defined and developed the architecture of an 8K-point FFT processor for COFDM demodulation (Algorithm analysis, Quantification noise optimization, FFT processor architecture definition and modeling)
    Three patents granted: G06F1/035
    , EP0718746 (A1)
    , and WO9741672 (A1)

    COMPETENCIES: TECHNICAL, MANAGEMENT AND BUSINESS

    System architecture Fifteen year experience working and managing system engineering & architecture activities:
    * Requirement Management , link to execution ;
    * Cross domain system architecture: Resource sizing, Security, Power management, Debug
    * Performance and power architecture optimization, from board & components to SW arch.
    * Architecture scaling for time-to-market and effort reduction
    * System integration of Media functions (Audio, Video, Imaging) and Wireless standards: (BT/BLE, WIFI, NFC, Cellular Modem, GNSS).
    * Good knowledge of Wireless Modems( RF , Baseband processing, Channel decoding, Narrow band, spread spectrum and OFDM modulation techniques)


    SW Seven year experience working on Android and RTOS System SW architecture , covering
    architecture * Android BSP and Middleware architecture ( Wireless Connectivity, Graphic rendering)
    * Multi CPU RTOS SW platform definition and scaling ;
    * SW architecture optimization for low power embedded systems ;

Formations

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